BASED IN THE UK

Hi, I’m
Mohammed.

I’m a compiler engineer at NVIDIA.

I work on LLVM and RISC-V. Here you’ll find my research and a few things I’ve built outside work.

See my projects GitHub
QWAC / WASM → NATIVE CODEGitHub
WASM → NATIVE CODE
WEBASSEMBLY
(module
  (func (export "twice")
    (param $x i32) (result i32)
    local.get $x
    i32.const 2
    i32.mul))
RV64IM
slliw a0, a0, 1
li t2, 0
ret

; machine-code bytes
1b 15 15 00
93 03 00 00
67 80 00 00

A saved example from qwac, my WebAssembly compiler.

1.8 MB · loaded on request.

Runs on your device. Nothing is uploaded.

WebAssembly support

Implemented: i32/i64 operations, scalar floats, structured control flow, direct and recursive calls, globals, a static function table, and one memory32 with scalar loads/stores.

Missing: imports/WASI, start functions, memory.grow, mutable tables, bulk memory, SIMD, atomics/threads, exceptions, and references beyond static function tables.

This demo generates native code; it doesn’t execute it. RISC-V uses the integer-only IM baseline; scalar floats are available with AArch64.

Maseed Connected prayer clocks for mosques and homes, with shared timetables and mosque radio.

01

Experience

LLVM toolchains for RISC-V CPUs.

NVIDIA NOWMAR 2024 — PRESENT

Senior Compiler Engineer

I maintain and optimize an LLVM toolchain for an embedded RISC-V CPU with custom extensions.

UK
Imagination TechnologiesJUN 2021 — JAN 2023

Senior Software Engineer

Led LLVM/Clang toolchain optimization for RISC-V CPU cores and contributed upstream to LLVM. Worked on compiler passes, instruction selection, and scheduling.

Hertfordshire, UK

02

Projects

RISC-V cores, a WebAssembly compiler,
and a few useful browser tools.

RISC-V / SYSTEMVERILOG

SuroV

A small multicycle RISC-V core written in SystemVerilog.

View on GitHub RISC-V / SPINALHDL

SuroV3

A configurable RISC-V core in SpinalHDL. The next version of SuroV.

View on GitHub WEBASSEMBLY / COMPILER

qwac

A small, single-pass WebAssembly compiler for RISC-V and AArch64.

View on GitHub

Browser tools

Live preview
IMAGES / UNICODE

Picunic

Turn images into Unicode art in your browser.

Live preview GitHub
Live preview
DAILY UTILITY

Prayer Times

Prayer times for your location, calculated on your device.

Live preview GitHub
Live preview
BANGLADESH / CIVIC DATA

Election Explorer

Explore Bangladesh’s 2026 election candidates, one constituency at a time.

Live preview GitHub

03

Research

WebAssembly, distributed systems, and edge computing.

Google Scholar
2022

WebAssembly for Edge Computing: Potential and Challenges

M. Nurul-Hoque & K. A. Harras

IEEE Communications Standards · 6(2), 45–52
2021

Nomad: Cross-Platform Computational Offloading and Migration in Femtoclouds Using WebAssembly

M. Nurul-Hoque & K. A. Harras

IEEE International Conference on Cloud Engineering · 178–189
2020

More Than The Sum of Its Things: Resource Sharing Across IoTs at The Edge

A. Essameldin, M. N. Hoque & K. A. Harras

IEEE/ACM Symposium on Edge Computing · 324–336

04

About

I studied Computer Science at Carnegie Mellon University. Before joining NVIDIA, I worked on RISC-V compilers at Imagination Technologies.

I like understanding how things work, then having a go at building them myself. That’s how most of my side projects start.

Carnegie Mellon University

B.Sc. Computer Science · GPA 3.96 / 4.0

Qatar Campus Scholar · College & University Honors · Full scholarship
TOOLS & LANGUAGES

C / C++ · RISC-V Assembly · Python
Rust · Verilog · LLVM
Git · CMake · Jenkins

SPOKEN LANGUAGES

English · Arabic
Chittagonian · Bengali

SAY HELLO

Get in touch.